1. Technical Field
Various embodiments relate to a semiconductor integrated circuit apparatus, and more particularly, to a semiconductor integrated circuit apparatus including a duty cycle detector.
2. Related Art
In the semiconductor circuit technology, a clock signal is used as a reference signal for adjusting operation timing in a system or circuit. When a clock signal inputted from an external device or an external system is used in the circuit or system, a clock skew is inevitably caused by an internal circuit. A semiconductor device, for example, a semiconductor memory device needs to compensate for such a clock skew and generate an internal clock signal having the same phase as the external clock signal. In order to generate the internal clock signal having the same phase as the external clock signal, the semiconductor device includes a delay locked loop (DLL) or phase locked loop (PLL) embedded therein.
Furthermore, the semiconductor device may include a duty cycle detector which receives a clock signal and detects the duty cycle of the clock signal.